This invention relates to a semiconductor device of the type having at least two wiring layers above a semiconductor substrate with upper and lower layers connected to each other at specified positions. More particularly, the present invention relates to a gate array which can be formed according to the functions desired by the user by providing according to the user's specification a first metallic wiring layer, a second metallic wiring layer and contact sections for connecting wire lines of these layers together.
In the field of semiconductor devices, ICs and LSICs according to the user's specifications, or what are commonly referred to as ASIC (application specific IC), are coming to be frequently developed and there seems to be an increasing trend to use them more widely. Two of the important requirements imposed on ASICs are that they can be developed quickly and inexpensively. There is, for example, a method called gate array whereby a large number of transistors are preliminarily arranged in positions and three contact mask sheets (individually for connecting wire lines of the first wiring layer, for connecting wire lines of the second wiring layer and for connecting wire lines of the two layers) are appropriately modified to produce an IC or LSIC having a structure desired by the user. According to the current gate array technology, however, three mask sheets are required for each IC or LSIC, as described above, that is, one each for the metallic wiring layers and another for the contacts (commonly referred to as throughholes), and subsequent processes are additionally required after the steps wherein these mask sheets are used.